From c71cbdb5072af88c3da91acaf6a48062d8441c85 Mon Sep 17 00:00:00 2001 From: Sam Hocevar Date: Wed, 16 Jul 2008 13:06:30 +0000 Subject: [PATCH] * Make the asm checks for fsin/fcos and fldln2/fxch/fyl2x more robust by forcing the tested code to use register contraints. --- configure.ac | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configure.ac b/configure.ac index 6b6f6ef..519658f 100644 --- a/configure.ac +++ b/configure.ac @@ -112,13 +112,13 @@ AC_TRY_COMPILE([#include ],[Sleep(42);], [AC_MSG_RESULT(no)]) AC_MSG_CHECKING(for fsin/fcos) -AC_TRY_COMPILE([],[asm("fsin\n\tfcos");], +AC_TRY_COMPILE([],[double x; asm("fsin\n\tfcos":"=t"(x):);], [AC_MSG_RESULT(yes) AC_DEFINE(HAVE_FSIN_FCOS, 1, [Define to 1 if you have the `fsin' and `fcos' operands.])], [AC_MSG_RESULT(no)]) AC_MSG_CHECKING(for fldln2/fxch/fyl2x) -AC_TRY_COMPILE([],[asm("fldln2; fldln2; fxch; fyl2x");], +AC_TRY_COMPILE([],[double x; asm("fldln2; fldln2; fxch; fyl2x":"=t"(x):);], [AC_MSG_RESULT(yes) AC_DEFINE(HAVE_FLDLN2, 1, [Define to 1 if you have the `fldln2' and other floating points operands.])], [AC_MSG_RESULT(no)])